40 MHz class of 486 processors

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Used CPU's and motherboards

I own the following 80486 processors with 40MHz clock:

My 486 CPU's with 40MHz core clock

The first processor is placed on a DataExpert 367C with an UNIchip U4800-VLX chipset and 128kB cache. My board supports maximum 20MB RAM (16MB bank 0 and 4MB bank1) - this board set the reference.

DataExpert 367C motherboard

For all other processors I used the UNICHIP 486 WB 4407 Rev. 1.0 because it has the same chipset. To be comparable to the 367C only one cache bank is filled with 128 kByte.

Motherboard 4407 with UNIchip chipset

This board and/or NetBSD 1.5.3 have a problem with the Cyrix Cx486DX. If I chose the Write-Back strategy for the 2nd level cache then NetBSD froze. So, I had to select Write-Through for this processor.

I own the coprocessor Cyrix Cx487S-40QP for the Cyrix Cx486S. But, unfortunately, the 4407 doesn't support this combination either.

Measurement results

The exactly setup is documented in this LibreOffice spread sheet.

First we tested the Dhrystone performance of all processors. Reference is always the TX486DLC processor:

Dhrystone performance

UMC tops Intel, so UMC must be better than AMD. The lower performance of the Cyrix processors can be caused by their smaller cache size: Cx486DLC: 1kB, Cx486S: 2kB (both have Write-Back 1st level caches) - AMD and UMC have 8kB Write-Through caches. The Cx486DX with 8kB Write-Back cache seems to be disadvantaged here because the 2nd level cache must be configured as Write-Through (see above) but remeasurements have confirmed this result (see below).

In the next step we check the throughput to the cache-, memory and IDE interface:

Cache test

Memory test

File write test

File read test

The CPU feeds the cache / memory interface with data, so the fastest CPU should have (and has...) the highest throughput. I have often measured this in the past: the interface of Cyrix processors to the memory is slower than other manufacturers.

At the end we measure the performance in handling of double precision numbers for all processors with a floating point unit (FPU). Reference is here the IIT 4C87DLC-40:

Mega flops test

We can see it here again: one big advantage of Cyrix processors were their floating point performance.

Remeasurement Cyrix Dhystones

I gave the Cyrix processors a second chance on an EXP4044VL board which can set all strategies for the first level cache in its bios:

EXP4044VL motherboard

But it helps nothing. The Dhrystone measurement is independent of the first level cache strategy. Cyrix keeps the last place...

Dhrystone test on EXP4044VL

Remeasurement Cyrix Cx486S stacked with Cx487S coprocessor

Here I used my repaired "fake cache" board AV7543. This board has, beside its disadvantages, a very strong point: it supports the Cx486S / Cx487S stack correctly:

Cx487S supports Cx486S Cx487S / Cx486S stack

The floating point performance of a Cx486DX on the AV7543 is very similar to the UNIchip board. So I left the IIT 4C87DLC-40 as reference.

MegaFlops result of the Cyrix Cx486S

An external co-processor is much slower than the integrated one. Normally, the performance of the FPU doesn't matter for retro-computing. Important is: you have one because this is a "must have"-requirement of all current operation systems...

We can summarize:


falk.richter*at*yandex.com
Last update: February 17, 2020