THE CACHE MEMORY
TOP
==================================================
This system board can support an optional 64KB, 128KB, 256KB, 512KB or 1MB external write
back, direct-mapped cache.
SOME CACHE MEMORY
CONSIDERATIONS
TOP
==================================================
Since single bank cache installations (B, D, F) prevent the cache sub-system from using
interleaving access, the "Auto Configuration" in the Advanced Chipset Setup must
be disabled and the "Cache Read Wait State" must also be set to
"3-2-2-2" to ensure proper operation.
CACHE MEMORY
CONFIGURATIONS
TOP
==================================================
Type Total Cache Bank
0 Bank
1 TAG Ram Pieces
(U21-24)
(U28-31) (U20)
----------------------------------------------------------------------------------------------------
A
64K 8K
x 8 8K x
8 8K X
8 9
B
128K 32K x
8
8K X 8 5
C
256K 32K x
8 32K x
8 32K X
8 9
D
256K 64K x
8
32K X 8 5
E
512K 64K x
8 64K x
8 32K X
8 9
F
512K 128K x
8
32K X 8 5
G
1024K 128K x
8 128K X 8 64K X
8 9
==================================================
CACHE MEMORY
JUMPER CONFIGURATIONS
TOP
==================================================
Type Cache JP5
JP10 JP11
JP12 JP13 JP14
----------------------------------------------------------------------------------------------------
A 64K 2 - 3
2 - 3 OPEN
OPEN OPEN OPEN
B 128K 1 - 2
1 - 2 OPEN
OPEN OPEN SHORT
C 256K 2 - 3
2 - 3 OPEN
OPEN SHORT SHORT
D 256K 1 - 2
1 - 2 OPEN
OPEN SHORT SHORT
3 - 4
E 512K 2 - 3
2 - 3 OPEN SHORT
SHORT SHORT
4 - 5
F 512K 1 - 2
1 - 2 OPEN SHORT
SHORT SHORT
3 - 4
5 - 6
G 1024K 2 - 3 2 -
3 SHORT SHORT SHORT SHORT
4 - 5
6 - 7
==================================================
THE MAIN MEMORY
TOP
==================================================
There are 2 banks of 72 pins SIMM socket and 1 bank of 30 pins SIMM socket on this board,
each bank of 72 pins SIMM consists of only one SIMM socket as denoted as Bank 1, Bank 2;
Bank 0 is the socket for the 30 pins' SIMMs. These three banks are not required to be
filled in sequence as in Bank 0 first and Bank 3 last. The system board has auto-detection
circuitry to sense which bank or banks are filled.
SOME MAIN MEMORY
CONSIDERATIONS
TOP
==================================================
Maximum memory on-board can not exceed 64MB in any
combination.
Bank 0 has to be filled fully (4 pcs.) with same type of SIMMs if
Bank 0 is to be used at all.
If Bank 0 is populated, then Bank1 and Bank2 CANNOT house any
double-sided SIMM modules.
POSSIBLE MAIN
MEMORY CONFIGURATIONS
TOP
==================================================
|------BANK 0------| |-------BANK 1-------|
|-------BANK 2--------|
# 30 PIN X
4 72 PIN
(U17) 72 PIN (U18)
----------------------------------------------------------------------------------------------------
1
256KB-16MB
256KB-16MB
NONE
2
256KB-16MB
NONE
256KB-16MB
3
256KB-16MB
256KB-16MB 256KB-16MB
4
NONE
NONE
256KB-16MB
5
NONE
256KB-16MB
NONE
6
NONE
256KB-16MB 256KB-16MB |